Draw the circuit diagram showing address decoding of eight 2K * 8 EPROM chips so that address assigned to them is FC000H - FFFFFH

To draw the circuit diagram for address decoding of eight 2K * 8 EPROM chips with the assigned address range of FC000H - FFFFFH, follow these steps:

Step 1: Determine the number of address lines required for decoding. Since each EPROM chip has a capacity of 2K (2048) bytes, it requires 11 address lines (2^11 = 2048).

Step 2: Calculate the number of EPROM chips needed to cover the address range. The address range from FC000H to FFFFFH has a total of 8192 (2K * 8) bytes. Divide this by the capacity of each chip (2048 bytes) to get the number of chips required, which is 4.

Step 3: Assign unique chip select (CS) signals to each EPROM chip. In this case, we have 8 chips, so we will assign CS0, CS1, CS2, CS3, CS4, CS5, CS6, and CS7 to each chip, respectively.

Step 4: Implement the address decoding logic using AND gates. Connect the address lines A0-A10 to the inputs of the AND gates. For each chip, connect the appropriate address lines to the corresponding AND gate inputs. For example, for CS0, connect A0, A1, A2, and A3 to the inputs of the AND gate.

Step 5: Connect the outputs of the AND gates to the chip select inputs (CS) of the EPROM chips. Each AND gate output will be connected to the respective chip's CS input.

Step 6: Connect the chip enable (CE) and output enable (OE) pins of all the EPROM chips to a common control signal.

Step 7: Provide power supply (Vcc) and ground (GND) connections to all the EPROM chips.

Step 8: Label the connections and components in the circuit diagram for clarity.

By following these steps, you can draw the circuit diagram for address decoding of eight 2K * 8 EPROM chips with the assigned address range of FC000H - FFFFFH.